Referring to FIG. 1, a conventional quad flat no-lead (QFN) lead frame device 1 is generally made by etching a flat sheet made of copper, an iron-nickel-based alloy, or a copper-based alloy to remove an unnecessary portion. The lead frame device 1 includes an outer frame member 11 and at least one lead frame unit 12. The lead frame unit 12 includes a die pad 13 surrounded by the outer frame member 11, and a plurality of spaced apart leads 14 extending from the outer frame member 11 toward the die pad 13.
When the lead frame device 1 is used as a chip carrier in a chip package, a chip 15 is first adhered to a top surface of the die pad 13, and then wires 16 are formed to interconnect the chip 15 and the leads 14 using wire bounding techniques. Thereafter, a molding material is applied to the die pad 13, the chip 15, the leads 14, and the wires 16 to form an encapsulating layer 17. Then, the encapsulating layer 17 is cured to form the chip package (as shown in FIG. 2). Subsequently, the chip package thus formed is then diced along a scribing line (imaginary lines as shown in FIGS. 1 and 2) to form a packaged chip. The single packaged chip is adapted to be electrically connected to a packaging substrate, such as a circuit board, to form an electric device.
However, the wires 16, which are usually made of silver, have a relatively poor adhesion to the lead frame device 1 made from copper. In order to improve reliability of the chip package, a portion of the leads 14 proximal to the die pad 13, which is depicted by the imaginary line shown in FIG. 1, are electroplated with a noble metal-containing material that has a relatively great adhesion to the silver wires 16, e.g. silver or a nickel-palladium alloy, prior to wire-bonding of the silver wires 16. However, the partially electroplating operation technique makes the manufacture of the packaged chip relatively complicated. In addition, a protecting layer has to be attached to a bottom surface of the lead frame device 1, which is opposite to the top surface of the die pad 13 provided with the chip 15 prior to the electroplating step. The protecting layer has to be removed posterior to the electroplating step. As a consequence, a scrapping step for removing a sticky residue of the protecting layer on the bottom surface is required, which tends to result in scratches on the lead frame device 1 and thus cause damage to the lead frame device 1. Therefore, an additional tin layer will be applied to the bottom surface for compensating the damage and for subsequent connecting with the circuit board. Furthermore, since the encapsulating layer 17 also has a relatively poor adhesion to the substrate for forming the lead frame device 1, the encapsulating layer 17 is likely to peel off the leads 14 of the chip package.